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Intel'due south server roadmap and product families have been pretty calm in contempo years. The company reorganized its server chips into the Xeon Scalable family and away from the onetime E7/E5/E3 designations in 2017, and it overhauled the Core X serial, but information technology hasn't made whatsoever dramatic changes to Xeon since AMD launched the Epyc family. Those changes are apparently coming in the first half of 2019, with the launch of Intel's latest loftier-end Xeon parts, Cascade Lake Avant-garde Performance. Unlike standard Cascade Lake fries, these fries will offer substantially more than cores and back up for up to ii-socket systems.

Intel's current line of Xeon Scalable Processors like the Xeon Platinum 8180, height out at 28 CPUSEEAMAZON_ET_135 See Amazon ET commerce cores. The new Cascade Lake AP chips, on the other hand, will pack up to 48 cores using an MCM. Intel hasn't unveiled any details on its interconnect notwithstanding, though information technology seems incredibly likely to leverage Intel's ain EMIB (Embedded Multi-dice Interconnect Span). EMIB is already used on Intel'due south Hades Canyon / Kaby Lake "G" silicon, and we doubtable it'll be used hither as well. Details of how Intel volition connect the MCMs together or how many cores are in each chiplet — that's the sort of particular we don't have nonetheless.

Intel-Xeon-1

It's not surprising to see Intel making this movement. When AMD had 32-core CPUsSEEAMAZON_ET_135 See Amazon ET commerce in-market place, Intel's monolithic 28-core chips, with their higher IPCs, weren't at an automatic disadvantage. Just AMD is widely expected to push as high every bit 64 cores with next-generation Epyc, and we've known for years that Intel wouldn't keep fielding monolithic chips forever.

Intel predicts operation that'southward 1.21x amend in Linpack than Xeon Scalable 8180 (three.4x better than AMD Epyc 7601), 1.83x amend in Stream Triad (1.3x better than Epyc 7601), and a 17x improvement in AI/Deep Learning inference compared with Xeon Platinum at launch. We don't accept a launch date for Cascade Lake other than 1H, so information technology'southward a skillful bet that whatever Intel fields will become caput-to-caput with AMD's Epyc two silicon, codenamed Rome, and congenital on 7nm at TSMC. Every bit large as 12 memory channels is, it's not crazy — as CPU core counts calibration upwards, motherboards need more than retentivity channels just to keep things relatively counterbalanced.

Like standard Pour Lake, Cascade Lake AP volition feature back up for Intel Optane Persistent Memory DIMMs and the hardware-level fixes for issues like Spectre and Meltdown. In the absenteeism of a formal release date, we're betting these fries don't tip upward much earlier summer — past which point they should have company from AMD.

Now Read: Intel Smashes Earning Targets, Denies 10nm Bug, Intel'southward 9th Gen CPUs Are Even so Hard to Find at Retail, and Intel Cadre i9-9900K Review: Welcome to an Intel-AMD viii-Core Slugfest